Looking closely at this module, I immediately noticed the utilitarian perfection of mid-1990s Japanese manufacturing. Placing it on the scale, it weighs exactly 11.3 grams, feeling light yet remarkably rigid for a piece of electronic history. The PCB is a rich, dark green, and flipping it over reveals a beautifully clean, unpopulated back with sweeping, deliberate traces and the factory marking E53571-E4-O.
The most prominent feature is the array of twelve black plastic SOJ (Small Outline J-lead) chips. The layout is distinctly clustered into eight larger data chips and four smaller parity chips. I always appreciate when the original manufacturer sticker survives the decades, and this one proudly displays the full part number.
Here is the exact surface text transcribed from the silicon and the label:
Label / Sticker:NEC
MC-421000A36BT-70
9538K1510989
Large Chips (8 units):NEC JAPAN
D424400GS
-70-9JD
9531HU002
Small Chips (4 units):NEC JAPAN
421000-70
9526F9209-JJH
The date codes here are incredibly consistent. 9531 points to the 31st week of 1995, while 9526 points to the 26th week. The module itself was likely assembled shortly after, placing this artifact squarely in the golden age of Windows 95 upgrades. I also noted the edge connector. Unlike the premium gold plating found on workstation hardware, these 72 contacts are tin-plated. This was a completely standard cost-saving measure for desktop consumer RAM, though it required builders to be careful not to mix tin modules with gold sockets to avoid galvanic corrosion.
Diving into the architecture of this artifact, we are looking at a classic 72-pin SIMM (Single In-line Memory Module). The 72-pin standard was a massive leap over the older 30-pin format, primarily because it offered a 32-bit data bus.
However, this specific unit is slightly more complex. The 36 in the part number MC-421000A36BT-70 indicates it is a 36-bit wide module. Those four extra bits are for parity. The eight larger D424400GS chips are 1 Megabit by 4-bit Fast Page Mode (FPM) DRAMs, providing the 32 bits of main memory storage (totaling 4MB). The four smaller 421000-70 chips are 1 Megabit by 1-bit DRAMs, tasked entirely with holding the parity bits to ensure data integrity.
Operating at a 70ns access time, this memory was built for systems with a 33MHz or 66MHz front-side bus. Fast Page Mode was the standard memory architecture before EDO (Extended Data Out) took over later in the decade. FPM allowed faster access to data located in the same memory "row" or "page" by holding the row address constant and only changing the column address, which saved critical nanoseconds during sequential reads.
This module tells the story of an incredibly transitional period in personal computing. In the era of the Intel 486, a processor with a 32-bit external bus, you could populate a motherboard using a single one of these 72-pin SIMMs. It was a massive convenience upgrade from the 30-pin days where you had to install memory in matched sets of four just to boot the machine.
When the Intel Pentium arrived with its 64-bit external data bus, the rules changed again. Enthusiasts and system builders quickly learned they had to install these 72-pin SIMMs in identical pairs to satisfy the wider bus requirement of the new architecture.
There is also a fun bit of lore surrounding parity memory like this. Back in the day, seeing "Parity Error - System Halted" on a black screen was enough to strike fear into any user. Because this module includes those extra parity chips, it can actually detect single-bit memory errors caused by cosmic rays or electrical noise. Mainstream users eventually decided they preferred the occasional unexplained system crash over paying the 10 percent premium for parity RAM, leading to the eventual phasing out of parity in standard consumer desktops.
I am highly confident in the identification and capacity of this specific unit. The visual evidence leaves zero room for ambiguity. By breaking down the NEC nomenclature on the label, MC designates a Memory Component assembly. The 421000 is the base density identifier representing a 1M depth. The 36 confirms the 36-bit width (32-bit data plus 4-bit parity). Multiplying a 1M depth by a 32-bit data width gives us exactly 4 Megabytes of usable capacity.
Furthermore, the 70 suffix on all the chips perfectly aligns with the 70-nanosecond speed rating. The physical construction, utilizing surface-mount SOJ packages soldered to a high-quality FR4 printed circuit board, matches every known technical databook standard for mid-90s NEC memory production. It is a flawless textbook example of a 4MB Parity SIMM.
